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OXDK FAQ |
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Application Note |
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| Layout Guideline |
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| General Routing and Placement |
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| 1. |
Place the high-speed USB host controller and major components on the unrouted board first. |
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| 2. |
With minimum trace lengths, route high-speed clock and high-speed USB differential pairs first. Maintain maximum possible distance between high-speed clocks/periodic signals to high speed USB differential pairs and any connector leaving the PCB (such as, I/O connectors, control and signal headers, or power connectors). |
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| 3. |
When it becomes necessary to turn 90˘X, use two 45˘X turns or an arc instead of making a single 90˘X turn. This reduces 0reflections on the signal by minimizing impedance discontinuities. |
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| 4. |
Do not route USB traces under crystals, oscillators, clock synthesizers, magnetic devices or ICs that use and/or duplicate clocks. |
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| 5. |
Stubs on high speed USB signals should be avoided, as stubs will cause signal reflections and affect signal quality. If a stub is unavoidable in the design, no stub should be greater than 200 mils. (use Switch IC PI3USB10 to change) |
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| 6. |
Route all traces over continuous planes (VCC or GND), with no interruptions. Avoid crossing over anti-etch if at all possible. Crossing over anti-etch (plane splits) increases inductance and radiation levels by forcing a greater loop area. Likewise, avoid changing layers with high-speed traces as much as practical. |
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| 7. |
Route USB trace pairs together. |
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| 8. |
Keep high-speed USB signals clear of the core logic set. High current transients are produced during internal state transitions and can be very difficult to filter out. |
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| 9. |
Follow the 20*h thumb rule by keeping traces at least 20*(height above the plane) away from the edge of the plane (VCC or GND, depending on the plane the trace is over). For the suggested stackup the height above the plane is 4.5 mils. This calculates to a 90-mil spacing requirement from the edge of the plane. This helps prevent the coupling of the signal onto adjacent wires and also helps prevent free radiation of the signal from the edge of the PCB. |
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| High Speed USB Termination |
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| 1. |
If the host controller uses external termination resistors, verify that it is less than 200 mils from the HS output pins of the host controller. |
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| 2. |
For downstream ports, verify that the 15k Ohm pull down resistors are between the termination resistors and the USB connector pins. Note that this pull down might be integrated into the host controller silicon. Follow the manufacturerˇ¦s recommendation for the specific part used. |
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| High Speed USB Trace Spacing |
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| 1. |
Maintain parallelism between USB differential signals with the trace spacing needed to achieve 90 ohms differential impedance. |
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| 2. |
Verify with an impedance calculator that trace spacing and trace width used on the specific board stackup results in 90 ohms differential impedance. |
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| 3. |
Minimize the length of high-speed clock and periodic signal traces that run parallel to high speed USB signal lines, to minimize crosstalk. Based on EMI testing experience, the minimum suggested spacing to clock signals is 50 mils. |
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| 4. |
Based on simulation data, use 20-mil minimum spacing between high-speed USB signal pairs and other signal traces for optimal signal quality. This helps to prevent crosstalk. |
trace spacing (mils) for the stackup given |
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| High Speed USB Trace Length Matching |
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| 1. |
HIGH SPEED USB signal pair traces should be trace length matched. Max trace length mismatch between HIGH SPEED USB signal pairs (such as, DM1 and DP1) should be no greater than 200 mils. |
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| Plane Splits, Void and Cut-Outs (Anti-Etch) |
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| 1. |
Traces should not cross anti-etch, for it greatly increases the return path for those signal traces. This applies to High Speed USB signals, high-speed clocks and signal
traces as well as slower signal traces, which might be coupling to them. |
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| 2. |
Verify that no high-speed USB traces are routed within 25 mils of any plane splits. |
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| 1. |
Locate high current devices near the source of power and away from any connector leaving the PCB. |
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| 2. |
Keep clock synthesizers, clock buffers, crystals and oscillators away from the high speed USB host controller, high speed USB traces, I/O ports, PCB edges, front panel headers, power connector, plane splits and mounting holes. This reduces the amount of radiation that can couple to the USB traces and other areas of the PCB. |
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| 3. |
Position crystals and oscillators so that they lie flat against the PCB. Add a ground pad with the same or larger footprint under crystals and oscillators having multiple vias connecting to the ground plane. These will help reduce emissions. |
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